Laboratory

Lab Time 2S2017:

• Group A1 Wednesday: 17:10-20:10
• Group A2 Friday: 8:00-11:10
• Group B1 Friday: 11:20-15:20
• Group B2 Friday: 18:45-21:35

Course Objectives:

This is an experimental course which presents the student, through dierent laboratory experiences, the operation and behaviour of dierent power electronics devices. Also, this course provides to the student a general background about software to program a Digital Signal Processor and CPLD, using Code Composer (C) and Quartus (VHDL) respectively. After the student has approved this course, the following specic goals are expected to be acquired:

• The student must be able to understand measurement and protection circuit in power electronics devices.
• The student must be able to program a DSP and CPLD applied to the operation of converter topologies such as rectiers, inverters and DC/DC converters.

Prerequisites:

Prerequisites of this course are dened by the Electrical Department of the Universidad de Santiago de Chile. Nevertheless, it is important the student has an undergraduate-level understanding of the following topics: VHDL and C programming.

Office Hours:

By appointment.

Course Outline:

• L1: Measurement, Protection and Digital Signal Processor.
• L2: Sampling Time and VHDL programming.
• L3: High power meassurements discretization and alliasing issues.
• L4: IGBT: Switching losses, conductions losses and gate drive configuration.
• L5: Controlled Rectifiers
• L6: DC/DC Booster Converter
• L7: Single-Phase DC/AC Inverter. (PWM) (temptative)
• L8: Three-Phase Inverter (PWM). (temptative)
• L9: Three-Phase Inverter (SVM). (temptative)
• L10: Recuperative session.